The present invention relates to a method for fabricating a semiconductor device and, more particularly, to a field oxide layer capable of being applied to a highly integrated DRAM (Dynamic Random Access Memory).
Generally, with the development of highly integrated circuits having a line width of 0.13 xcexccm or less, an epi-channel device using a selective epi-silicon has been developed in order to decrease variation of the threshold voltage caused by the gate length.
FIGS. 1A to 1C are cross-sectional views illustrating a method for making a conventional field oxide layer. Referring to FIG. 1A, a pad oxide layer 12 and a nitride layer 13 are deposited on a semiconductor substrate 11 in that order and a field region is defined by selectively patterning the pad oxide layer 12 and the nitride layer 13. A trench 14 is formed using the patterned pad oxide layer 12 and nitride layers 13 as an etching mask. Also, a photoresist layer may be used as an etching mask, instead of the patterned pad oxide and nitride layers 12, 13. This process of making a trench is called the STI (Shallow Trench Isolation) method.
Referring to FIG. 1B, a thin oxide layer 15 is formed by applying an oxidation process to inner sidewalls of the trench 14. The trench is buried in an oxide layer, and then a chemical and mechanical polishing is applied to the buried oxide layer until the nitride layer 13 is exposed. After a portion of the buried oxide layer is etched, a final field oxide layer 16 is formed by removing the nitride layer 13 and by isotropically etching the buried oxide layer. At this time, the topology of an edge of the field oxide layer 16 may be lower than that of the semiconductor substrate 11 leaving a recess (A); this is called the xe2x80x9cMoatxe2x80x9d phenomenon.
FIG. 1C illustrates a well ion-implantation process. A screen oxide layer (not shown) is formed on the exposed semiconductor substrate 11 and ion-implantation is carried out to adjust the threshold voltage. After removing the screen oxide layer, a channel epi(epitaxial)-silicon layer 17 is formed by the selective epitaxial growing method. At this stage, the channel epi-silicon layer 17 may grow at the edge of the trench 14 because of the recess A which was generated due to the xe2x80x9cMoatxe2x80x9d phenomenon. The edge of the active silicon in the semiconductor substrate 11 may have the recess A, because the channel epi-silicon layer 17 grows at the side of the exposed semiconductor substrate 11 while the epitaxial process for the channel epi-silicon layer 17 is carried out.
The channel epi-silicon layer 17 growing at the edge of the active silicon makes the gate oxide layer thin. Also, a polysilicon layer, which resides in the recess A, may connect transistors to each other at the time of forming word lines. Furthermore, an electric field is concentrated at the edge of the channel epi-silicon layer 17 so that the electric characteristics of the semiconductor device may be degraded.
It is, therefore, an object of the present invention to provide a method for fabricating a field oxide layer to isolate other adjacent devices.
It is another object of the present invention to provide an improved semiconductor device to prevent INWE (Inverse Narrow Width Effect) in which threshold voltage of a MOS transistor decrease due to the decreased gate width.
It is a further object of the present invention to provide a method fir fabricating a field oxide layer having improved electrical characteristics without there being an electric field concentrated at an edge between a field oxide layer and an active region.
In accordance with an aspect of the present invention, there is provided a method for forming a semiconductor device comprising: a) forming a trench in a semiconductor substrate; b) forming an insulating layer on the resulting structure and burying the trench; c) forming a field oxide layer by controlling topology of the insulating layer in a wet etching process, wherein the wet etching process forms a recess at a corner of the field oxide layer so that a portion of sidewalls of the active region is exposed; d) forming an additional field oxide spacer layer at the recess in order to fill the exposed sidewall portion of the active region; and e) vertically growing an epitaxial layer on the exposed active region.